lides topic

Three-Level NPC Inverter Based MV Drive
Topic 7
Multilevel Neutral Point Clamped (NPC)
Inverters
Courtesy of ABB (ACS1000)

Lecture Topics
Three-level NPC Inverter
Space Vector Modulation
Neutral Point Voltage Control
High-level NPC Inverters
Multilevel NPC Inverters

Inverter Configuration
Clamping diodes: DZ1 and DZ2 (Phase A)
Three-Level NPC Inverters

Switching State
Complementary Switch pairs:
S1 and S3; S2 and S4;
Three-Level NPC Inverters

Gate Signal Arrangements
Inverter phase voltage vAZ has three levels: E, 0 and –E
Three-Level NPC Inverters

Inverter Output Waveforms
Three-Level NPC Inverters

Space Vectors
Three-phase voltages
Two-phase voltages
Space vector representation
(2) → (3) where
(3)
(1)
(2)
(4)
Space Vector Modulation

Switching state [POO] → on-state switches:
Phase A: upper two switches [P]
Phase B: middle two switches [O]
Phase C: middle two switches [O]
and
Substituting (5) to (4) gives a space vector
(5)
(6)
Space Vectors (Example)
from which
Total switching states: 27
Total space vectors: 19
Space Vector Modulation

Space Vectors Diagram
19 space vectors:
Zero vector: V0
Small vectors: V1 – V6
Medium vectors: V7 – V12
Large vectors: V13 – V18
Space Vector Modulation

Switching States and Space Vectors
Redundancy: Zero vector – three switching states
Small vectors – two states per vector
Space Vector Modulation

No redundant switching states for medium or large vectors
Switching States and Space Vectors
Space Vector Modulation

Sector Definition
Vref : Reference vector, rotating in space at a certain speed;
All other vectors are stationary.
Space Vector Modulation

SVM Principle
For a given length and position in space, Vref can be approximated
by three nearby stationary vectors;
Based on the chosen stationary vectors, switching states are
selected and gate signals are generated;
When Vref passes through sectors one by one, different sets of
switches are turned on or off;
When Vref rotates one revolution in space, the inverter output
voltage varies one cycle over time;
The inverter output frequency corresponds to the rotating speed
of Vref ;
The inverter output voltage can be adjusted by the magnitude of Vref.
Space Vector Modulation

Dwell Time Calculation
Use volt-second balancing principle
Select three nearest stationary vectors
Sector I
Four Regions
Dwell time is the duty-cycle time
of selected switches during the
sampling period Ts .
(a)
Space Vector Modulation

Dwell Time Calculation
Ta , Tb and Tc – dwell times for V1 , V7 and V2
– modulation index
From equation (a)
Space Vector Modulation

Switching Sequence (Seven-segment)
General Design Requirements
a) The transition from one switching state to the next involves only
two switches in the same inverter leg, one being turned on and
the other turned off; and
b) The transition for Vref moving from one sector (or one region)
to the next requires no or minimum number of switchings.
Note:
The switching sequence design is not unique, but the above
requirements should be satisfied for switching frequency
minimization.
Space Vector Modulation

Switching Sequence (Seven-segment)
Assuming Vref is in Region 4 of Sector I,
three vectors are selected: V2 , V7 and V14
Space Vector Modulation

Switching Sequence (Seven-segment)
Switching sequence requirement a) is satisfied.
Space Vector Modulation

Switching Sequence (Seven-segment)
Space Vector Modulation

Switching Sequence (Seven-segment)
Switching sequence requirement b) is satisfied.
Device switching frequency:
Sampling frequency:
Fundamental frequency:
Space Vector Modulation

Simulated Waveforms (Seven-segment)
f1 = 60Hz, Ts = 1/1080 sec, ma = 0.8, fsw = 570Hz
vAB is not half wave symmetrical; and
contains both even- and odd-order harmonics.
Space Vector Modulation

Simulated Waveforms (Seven-segment)
f1 = 60Hz, Ts = 1/1080 sec, ma = 0.8, fsw = 570Hz
Space Vector Modulation

Harmonic Content (Seven-segment)
Space Vector Modulation

Laboratory Prototype at Ryerson
Space Vector Modulation

Measured Waveforms
Space Vector Modulation

Measured waveforms (with even-order harmonic elimination)
Space Vector Modulation

Neutral Point Voltage Deviation
The neutral point voltage vz can be controlled by
P- and N-types of small vectors
Neutral Point Voltage Control

Neutral Point Voltage Control
Neutral Point Voltage Control

Neutral Point Voltage Control
R is used on purpose to make the dc voltage unbalance.
Neutral Point Voltage Control

Inverter Topologies
High-Level NPC Inverters

Switching State
High-Level NPC Inverters

Component Count
Note:
The number of clamping diodes increases substantially
with the voltage level.
High-Level NPC Inverters

IPD Modulation (four-level)
High-Level NPC Inverters

Harmonic Content (four-level, IPD Modulation)
High-Level NPC Inverters

APOD Modulation (four-level)
High-Level NPC Inverters

Harmonic Content (four-level, APOD Modulation)
High-Level NPC Inverters

The 3-level NPC inverter widely used in MV drives
Main features
- Low device count
- No switches in series
- Suitable for medium voltage operation
The practical use of 4- or 5-level NPC inverters not reported
Main reasons
- Difficulties in dc capacitor voltage control
- Large number of clamping diodes
Summary